MEMS SiGe Technology

Ann Witvrouw, Principal Scientist, IMEC

Introduction

Micro-electromechanical systems (MEMS) devices require an integrated circuit for signal conditioning. Combining MEMS and its electronics can be done either by using a hybrid approach, in which CMOS and MEMS are developed on separate chips that are assembled together afterwards, or by using a monolithic approach, in which co-integration by using a special process flow allows for a single chip/single package solution. About half of the current MEMS market uses a hybrid approach and half a monolithic approach.

Hybrid integration has the advantage of a fast time to market and allows for an independent optimization of the integrated circuit (IC) and the MEMS technology. On the other hand, the assembly and packaging cost is higher in comparison to the monolithic approach. This is certainly the case if a large number of interconnections need to be made or for small chips. Consequently, the longer development time needed for the monolithic approach can be paid back by the reduced assembly and packaging cost for chips having a size below a critical area, which depends on the complexity of the MEMS process, for chips having more interconnections than a certain critical number and for large volumes. Monolithic integration can also be chosen in cases where an increase in system performance is required. When separate chips for the MEMS and the IC are used, performance-limiting parasitics are present due to the interconnections between the MEMS and logic chip. These parasitics result mainly from the size of the bond pads and from the long bonding wires and are reduced substantially by on-chip integration.

IMEC proposes a monolithic approach for MEMS on top of CMOS using SiGe as structural material. Contrary to the other types of monolithic approaches, as MEMS first or MEMS interleaved in the CMOS process, the IMEC approach provides a high degree of modularity, like use of low cost and state of the art CMOS foundries. Furthermore, it is best suited for high volume and reduced area size products requiring low power consumption and high performance. Several
functionalities can be combined on the same chip (eg. multi-axes accelerometers and gyroscopes) giving an additional degree of freedom for designers to reduce the complexity of the CMOS signal conditioning. Monolithic approach is often also the only available solution for dense array applications such as imagers or scanning probe systems for memory applications.

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